The present invention relates to magneto-resistive memories, and more particularly, to magneto-resistive memory cell structures that offer superior selectivity of memory cells.
As computer memory technology advances, magneto-resistive memory has emerged as a possible replacement for conventional memory devices. Magneto-resistive memories arc non-volatile and employ the magneto-resistive effect to store memory states. These memories typically use the magnetization orientation of a layer of magneto-resistive material to represent and to store a binary state. For example, magnetization orientation in one direction may be defined as a logic xe2x80x9c0xe2x80x9d, while magnetization orientation in another direction may be defined as a logic xe2x80x9c1xe2x80x9d.
The ability to read stored binary states is a consequence of the magneto-resistive effect. This effect is characterized by a change in resistance of multiple layers of magneto-resistive material, depending on the relative magnetization orientations of the layers. Thus, a magneto-resistive memory cell typically has two magnetic layers that may change orientation with respect to one another. Where the directions of the magnetization vectors point in the same direction, the layers are said to be in a parallel orientation and where the magnetization vectors point in opposite directions, the layers are said to be oriented anti-parallel. In practice, typically one layer, the xe2x80x9cfreexe2x80x9d or xe2x80x9csoftxe2x80x9d magnetic layer, is allowed to change orientation, while the other layer, commonly called the xe2x80x9cfixed,xe2x80x9d xe2x80x9cpinnedxe2x80x9d or xe2x80x9chardxe2x80x9d magnetic layer, has a fixed magnetization orientation to provide a reference for the orientation of the free magnetic layer. The magnetization orientation of the two layers may then be detected by determining the relative electrical resistance of the memory cell. If the magnetization orientation of its magnetic layers are substantially parallel, a memory cell is typically in a low resistance state. In contrast, if the magnetization orientation of its magnetic layers is substantially anti-parallel, the memory cell is typically in a high resistance state. Thus, ideally, in typical magneto-resistive memories, binary logic states are stored as binary magnetization orientations in magneto-resistive materials and are read as the binary resistance states of the magneto-resistive memory cells containing the magneto-resistive materials.
Giant magneto-resistive (GMR) and tunneling magneto-resistive (TMR) memory cells are two common types of memory cells that take advantage of this resistance behavior. In GMR cells, the flow of electrons through a conductor situated between a free magnetic layer and a pinned magnetic layer is made to vary, depending on the relative magnetization orientations of the magnetic layers on either side of the conductor. By switching the magnetization orientation of the free magnetic layer, the electron flow through the conductor is altered and the effective resistance of the conductor is changed.
In TMR cells, an electrical barrier layer, rather than a conductor, is situated between a free magnetic layer and a pinned magnetic layer. Electrical charges quantum mechanically tunnel through the barrier layer. Due to the spin dependent nature of the tunneling, the extent of electrical charges passing through the barrier vary with the relative magnetization orientations of the two magnetic layers on either side of the barrier. Thus, the measured resistance of the TMR cell may be switched by switching the magnetization orientation of the free magnetic layer.
Switching the relative magnetization orientations of the magneto-resistive materials in the memory cell by applying an external magnetic field is the method commonly used to write a logic state to a magneto-resistive memory cell. The magnitude of the applied magnetic field is typically sufficient to switch the magnetization orientation of the free magnetic layer, but not large enough to switch the pinned magnetic layer. Thus, depending on the desired logic state, an appropriately aligned magnetic field is applied to switch the magnetization orientation of the free magnetic layer so that the magneto-resistive memory cell is in either a high or a low resistance state.
Magneto-resistive memory cells are typically part of an array of similar cells and the selection of a particular cell for writing is usually facilitated by use of a grid of conductors. Thus, magneto-resistive memory cells are usually located at the intersections of at least two conductors. A magneto-resistive memory cell is typically selected for writing by applying electrical currents to two conductors that intersect at the selected magneto-resistive memory cell. With current flowing through it, each conductor generates a magnetic field and, typically, only the selected magneto-resistive memory cell receives two magnetic fields, one from each conductor. The current flowing through both conductors is such that the net magnetic field from the combination of both these magnetic fields is sufficient to switch the magnetization orientation of the selected cells. Other magneto-resistive memory cells in contact with a particular conductor usually receive only the magnetic field generated by that particular conductor. Thus, the magnitudes of the magnetic fields generated by each line are usually chosen to be high enough so that the combination of both fields switches the logic state of a selected magneto-resistive memory cell but low enough so that the other magneto-resistive memory cells subject to only one magnetic field do not switch.
In addition to the two conductors for writing, memory arrays with three conductors connecting magneto-resistive memory cells have also been developed. The additional conductor may be used exclusively for sensing the resistance of a particular memory cell, allowing another conductor to be used exclusively for writing. In this way, writing and reading operations may be performed simultaneously, increasing the speed of data access. Furthermore, the third conductor can also be employed to supply an additional magnetic field during switching operations.
Magneto-resistive memory technology continues to mature and work continues in refining implementation of magneto-resistive memory cells.
The preferred embodiments of the present invention provide magneto-resistive memory cell structures which minimize disruptions to the magnetization orientation of the free magnetic layer caused by interactions with pinned magnetic layer magnetic fields. In a preferred embodiment, looking at a top-view of the memory cell, a magneto-resistive memory cell is formed with two widened end-portions on either side of a thinner mid-portion. The two widened end-portions may each be of different dimensions and may abut the mid-portion at different angles, so long as the widened end-portions maintain a width greater than their length. In another embodiment, the mid-portion is centered along the width of the two portions, forming an I shape with the end portions. In other embodiments, the mid-portion is not centered along the width of the two end-portions.
As a consequence of the presence of the widened end-portions, the mid-portion is substantially free of magnetic coupling. Thus, the magnitude of an applied magnetic field used to switch a magnetization orientation of the free magnetic layer in one direction is substantially equal to the magnitude of an applied magnetic field used to switch the magnetization orientation of the free magnetic layer in a substantially opposite direction.
Other features and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the teachings of the invention.